Planning for Fault-Tolerance with QC Design

Pavel Hrmo
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Planning for Fault-Tolerance with QC Design

We are very pleased to announce that we have begun a pilot project that leverages QC Design’s Plaquette software, a quantum design‑automation platform that will help us design scalable fault‑tolerant architectures. The pilot will enables us rigorously simulate, analyze, and optimize fault‑tolerance designs for its micro‑fabricated Penning ion‑trap architecture, well before committing to fabrication and bring‑up.

ZuriQ’s approach features full 3D reconfigurability of single‑ion sites above the chip using only static electromagnetic fields, a key enabler for scalability and fault tolerance. Integrating Plaquette into ZuriQ’s R&D workflow will provide system‑level insight into trapped‑ion non‑idealities such as motional‑mode heating, shuttling‑induced errors, and magnetic‑field noise.

Understanding the impact of these and other imperfections is essential when refining control strategies, choosing quantum error‑correcting codes, and making architecture trade‑offs on the path to practical fault tolerance. Plaquette supports 20+ real‑world hardware imperfections and offers an extensive library of error‑correction codes and decoders, with built-in support for all hardware platforms and on‑premises deployment for IP protection.

“Our Penning micro‑trap lets us reconfigure qubits freely in 3D and bring any pair together when needed. That connectivity reduces circuit depth for many workloads and can ease the requirements for building useful, fault‑tolerant quantum computers. Plaquette gives us a systematic, end‑to‑end way to test fault‑tolerance protocols ahead of hardware, identify the biggest performance levers early, and move faster with higher confidence,” said Dr. Pavel Hrmo, CEO of ZuriQ.
“Plaquette is built to quantify fault-tolerance performance under realistic conditions across hardware platforms. We’re excited to support the incredible team at ZuriQ as they push trapped ion processors toward scalable fault tolerance,” said Dr. Ish Dhand, CEO of QC Design.

The pilot targets the industry’s central goal: reliable, fault-tolerant operation at scale. ZuriQ is advancing a Penning‑trap QCCD architecture in which ions are transported without junctions and the array is reconfigured deterministically in three dimensions, improving effective connectivity and compilation overheads. QC Design continues to accelerate the industry on the path to fault-tolerant quantum computing by partnering with leading hardware teams through pilots and subscriptions.


About ZuriQ

ZuriQ is a Switzerland‑based quantum computing company developing micro‑fabricated Penning ion‑trap processors that use static electric fields and a homogeneous magnetic field to confine ions, enabling arbitrary placement and 3D reconfigurability of qubits above the chip. The architecture aims to deliver lower circuit depths through dynamic connectivity, improving the practical requirements for fault‑tolerant quantum computing. ZuriQ is a spin‑out rooted in research at ETH Zurich.

About QC Design

QC Design builds Plaquette, a design‑automation platform for fault‑tolerant quantum computing. Plaquette lets hardware teams simulate, analyze, and optimize architectures under realistic conditions, modeling 20+ hardware imperfections, well beyond typical open‑source tools, and providing libraries of QEC codes and decoders. With deep expertise in fault-tolerance strategies and a suite of advanced tools, QC Design enables quantum hardware teams to design scalable quantum computers faster and at an order of magnitude lower cost than building and maintaining similar software in-house.

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